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Poss ferroelectric random access memory in multi- CPU automatic diagnosis control system application
Origin: Input time: 07-06-10 02:00:25English version


The Applicaton of FRAM
In Auto-ID Control System Based on Multi-CPU

Abstract: This article through to take 4 门门 endures the controller to introduce as representative's automatic diagnosis control system function that, compared with detailed produced the multi- cpu way to do primarily controls the way the plan design, ingenious used poss ferroelectric random access memory FM3808 to fall the electricity data preservation, the clock as well as may the supervisory system high integration characteristic, simultaneously has solved the past multi- CPU data exchange bottleneck through FM24c16 as the main center bridge, thus established nimbly, is inexpensive, the function formidable multi- mouths data acquisition control system frame.
Essential character: Automatic diagnosis multi- CPU system FM3808 FM24c16

1st, automatic diagnosis control system synopsis
The automatic diagnosis technology is reads the data automatic knowledge, the automatic input computer one method or the method. It is includes the bar code technology, the bar magnet (card) collection computer, the light and so on technical, optical character recognition, system integration, radio frequency technology, sound recognition and visual recognition, mechanical and electrical, the communication is a body comprehensive nature high new science and technology. The automatic diagnosis technology fast, accurately provided has carried on the data acquisition input the effective method, solved the manual data feeds speed slow, has been wrong higher rate creates "the bottleneck" the difficult problem, thus the automatic diagnosis technology took one kind of revolutionary high-tech, accepted day by day for the people.
The automatic diagnosis control system is the collection microcomputer automatic diagnosis technology and the modern safety control and the control measure is a body system, it involves the electron, the machinery, optics, the computer technology, the communication technology, the biological technology and so on many new technologies. Is the solution integral part access realization safe guard management effective action. Including the access 门禁 safety control system, the elevator control system, the vehicles turnover control system, the property fire prevention supervisory system, the security inspect the management system management system and so on, is suitable each kind of confidential depts kcode and cipher, like bank, guesthouse, engine room, ordnance depot, 机要? work, intellectualized plot, factory and so on.
The automatic diagnosis control system in administration work and so on in working conditions security, human affairs checking attendance management is playing the huge role. Therefore will design a section performance price quite high product to have the widespread application prospect.
2nd, automatic diagnosis control system function composition
Is strong, the function complete automatic diagnosis control system as one versatility, should have the multitudinous composition essential factor. Under we on 4 门门 endure the controller take as regularly to explain, its function module composition as follows:
4 groups open the gate black-white control electric circuit +1 groups to report to the police the black-white control electric circuit
4 路门 positions signals detect the electric circuit +4 groups to open the gate button signal to detect the electric circuit +4 groups to guard against the destruction signal to detect the electric circuit
4 groups switches quantities input circuit +4 groups switches quantities output circuit
8 group WIGEN signal decoding circuit (uses in to meet 8 WIGEN to read card)
2 group ABA signal decoding circuit (uses in with 2 groups keyboards simulations signal circuit to meet 2 ABA to read card or 2 keyboards simulations reads card)
1 group TTL232/RS232 signal decoding circuit (uses in to meet 1 TTL232/RS232 to read card)
1 group RS485 signal control electric circuit (uses in to connect reaches 32 RS485 way to read card)
1 group equipment ID number establishment dials breaks the switch
Clock chip control circuit
The memory chip control circuit (uses in to save user information and event information)
System monitoring circuit
The communication channel (uses in with on position machine to carry on communication)
3rd, several kind of hosts control the design proposal the comparison
Along with the electronic technology development, each kind of CPU, the memory chip, the system expansion chip, the clock chip and so on emerge one after another incessantly, while gave designs the personnel to have more choices, also has brought another question, how was should choose one kind to suit to own one kind of plan. This plan not only must be able to realize the system demand basic function, but also must in reliable, the development difficulty degree, the chip supply goods aspect and so on situation as well as price all must achieve is suitable. 4 controllers function characteristics lists which in view of above, we may make following several plans:
3.1. Traditional form
This is one kind for generally inserts the form which the type system design personnel knew very well, has the detailed introduction in very many textbooks and the application system.
Controls the aspect in the host, generally uses applies the broadest 8051+EPROM program memory either has large capacity FLASH ROM CPU like SST89C58 or P89C51RD2
In the system expansion aspect, 2 piece of 74HC138 uses in to decode, 1 piece of 74HC373 uses in the status address lock to save, 1 piece of 74HC245 uses in the main line to actuate, 3 piece of 74HC377 uses in the signal output, 4 piece of 74HC244 uses in the signal input
The memory aspect, a piece 628,128 uses in to save the event information and exterior variable, piece of 28SF040 or 39SF040 use in to save each kind of effective card, the illegal card information
The clock aspect, uses a piece of serial mode DS1302 or parallel data mode DS12C887
The communication aspect, 2 pieces of 485 chips, a piece uses in with on position machine communication, a piece uses in with RS485 to read the card communication
This way has the chip price cheaply, supplies goods the channel widely, the programming debugging is easier and so on the merit, but its volume huge, chip many, the hardware breakdown spot increases, moreover because duty multitudinous, causes CPU to work busily, in the software each kind of interrupt processing is easy to disturb, although the present had based on 8,051 real-time multi- duties operating system may solve this problem, but this requests the designer on the one hand to have to choose price relatively high CPU, on the other hand also must study digests RTX51, but to go its correct application system in the need higher software skill and the more debuggings time. Otherwise the software reliability is unable to guarantee. This regarding the product fast market is disadvantageous.
3.2.ARM+CPLD
The ARM chip and the CPLD chip were recently several years popularly gets up inserts the type system the constitution part, after they possibly will become the PC time to insert the type system design the first choice. ARM is section 32 simplifies the instruction collection (RISC) the processor overhead construction, by its high performance, the low power loss, the low cost holds the market. Take PHILIPS LPC2104 as the example, it has 128K the internal Flash program memory, most 64K static RAM, double UART, two timers, has 4 groups capture/to compare the channel, to reach 6 groups outputs the PWM units, the real-time clock, 看门?the timer, the general I/O mouth, the CPU operating frequency may reach characteristic and so on 60MHz.
CPLD is the complex programmable logical array abbreviation, it has the mouth line many, the speed quick, is programmable, characteristic and so on pure hardware electric circuit.
4 controllers functions proposed which according to us, piece of ARM and piece of CPLD, the little periphery electric circuit, then realizes in addition. Like this not only causes the system board the volume greatly to reduce, moreover increased the reliability, this is other ways cannot compare. But, because ARM and CPLD are the emerging technology, says regarding some based on 8,051 monolithic integrated circuits experienced designers, actually needs some not short time to study the digestion practice, moreover, related ARM and the CPLD development kit, like the simulator, integrated development environment IDE all in a quite high price position, also the study and the use 8,051 was all more difficult than to be many. This not only is disadvantageous to the product fast market, moreover does not suit to certain situation flexible designs. Moreover, at present these two kind of chips price 8,051 compositions system prices still were higher, this not too suited applies the universal controller which proposed to this article.
3.3. Multi- CPU system
In process after above two kind of plans comparison, whether also has other some kind of use chip quantity few, the price cheapest, the function is most complete, designs the flexible plan? The answer is firmly. That uses the multi- CPU system. Based on 8,051 chips like AT89x52 widespread use, causes the monolithic integrated circuit the price greatly to drop. At present, the 89X52 market retail price already was lower than 8255, 8,279, 8,253, 8,250 and so on in the special-purpose connection chip any kind; Above but the 89X52 function goes far beyond in fact the chip. Therefore, like 89x52 took the connection chip use, in the economy is worthwhile. Has like this solved the system expansion chip multitudinous shortcoming. Piece of 89x52 has 32 I/O mouth, may make the input output, also has 3 timers and 2 external interrupts, definitely may solve to ABA/WIGEN/232 different serial signal processing.
Just like software may realize by real-time multi- duties operating system RTOS is same, the hardware equally may use the system which multi- CPU composes to realize.
Thus, this article proposed 4 controllers together will be composed by 3 piece of CPU below, it will have the characteristic chip number to be few. Except the memory chip and the clock chip, basically only are left over 3 89S52 CPU with the 89S52 price low characteristic outside, acts as supposes. Uses nimbly. May reduce some CPU according to the situation or change its procedure to complete the different function originally to write in CPU the procedure separation, causes each chip basically completes in 8K, also is all may choose 89S52, not to need to use expensive large capacity FLASH 8,051 essences CPU. Added 看门?whether advocates CPU to be allowed real-time monitoring other two CPU work normal each CPU to perform its own functions. Enhanced with on position machine communication speed and the accuracy, enhanced the read-write memory speed as well as visits FALSH the time. Because a duty will decompose, therefore each CPU will use the register will be less, will be allowed to use 256 byte RAM which 89S52 will bring then, will not need to use XDATA to visit in RAM CPU, enhanced each CPU execution speed.
4th, chooses FM3808 is the multi-purpose memory, the clock, the system monitoring chip
4.1. Traditional way explanation
After has established the host controls the way, must choose saves, the clock and the system monitoring chip, we first analyze the former chip the choice
If 3.1 kind of institutes describe, has 512K BYTES besides the choice FLASH the ROM chip to take the card number memory chip (because regardless of effective invalid card number, its change frequency is not high, uses this chip not to be able to affect chip), took the commonly used information storage and exterior register chip, generally uses SRAM like 628,128, although this chip at present the price very is cheap, after but because the system falls the electricity, all information vanish, therefore must add the electricity protection circuit and the battery. But regardless of uses special-purpose falls the electricity protection chip and uses the discrete component to compose to the electric circuit, all cannot 100% guarantee data department loss, not be in particular unstable in the power source and under the disturbance serious environment.
The clock has the multitudinous choice, like DS1302 and 12,887, but the price not lowly monitors the chip also to have very many kinds, like X25045, it integrated 看门? characteristic and so on voltage monitor, reliable replacement and EEPROM, but the price is not low.
4.2. FM3808 characteristic
In order to enable the system to have a higher reliability as well as the miniaturization, we will use RAMTRON the new multi-purpose chip:
The FM3808, one kind will fall the electricity must to lose, the real-time clock, the system monitoring to a body high performance chip. Below it has the characteristic:
32K*8 BIT non- is easy to lose RAM
Reaches as high as 10 billion times of read-write number of times
Writes without the time delay
The data may preserve for 10 years
In sets at the low voltage protection
Real-time clock
Reserve power source cut
The programmable clock calendar reports to the police
Programmable 看门?timer
Power source monitor
Programmable severance output
Programmable CPU replacement or severance
5V working voltage
The reserve voltage may lower to 5V
Dynamic electric current 25mA
Clock reserve electric current 1uA
5th, chooses FM24C16 to take the multi- CPU message center
In the establishment after the multi- CPU way took the systematic host controls the plan, needs to solve a most essential problem, that is between the CPU communication. Let us first compare next several kind of data exchanges the good and bad points.
5.1. Between several kind of monolithic integrated circuits mailing addresss feasibility analysis
Uses hardware UART to carry on the asynchronous serial communication. This is one kind takes the mouth line to be few, effective, reliable mailing address; But in 4 controllers ways which this article proposed, CPU UART must complete with on position machine communication, CPU UART is responsible with 485 to read the card or 232 reads the card between the communication, obviously the hardware resources is insufficient. This method does not suit this example.
Uses the internal SPI connection or the 2C main line module serial communication form. The SPI/I2C connection has the hardware simply, the software programming is easy and so on the characteristic, but the present majority monolithic integrated circuit does not have the hardware SPI/I2C module. Specially we use general inexpensive 89X52 series monolithic integrated circuit. This method is not feasible. The mouth suitable parallel correspondence, direct is connected using the monolithic integrated circuit mouth line, adds on 1 ~ 2 to shake hand the holding wire. This way characteristic is corresponds the speed quickly, 1 may transmit 4 or 8, even are more, but parallel RAM needs to take the massive mouths line (data line + address wire + read-write line + piece route selection + to shake hand line), generally above 16. This is the numeral which lets the person be awed at the sight, moreover can greatly increase the PCB area and bring the certain difficulty to the wiring. This counteracts to uses in the CPU mouth line to expand the mouth line the characteristic. Causes the actual need the mouth line not to be insufficient, therefore also is not feasible. Takes the buffer correspondence using pair of mouth RAM. This way most major characteristic is corresponds the speed to be quick, nearby two all may straight take over the use of the read-write memory the instruction direct operation; But this way needs the massive mouths line, moreover the pair of mouth RAM price is very high. Similarly does not give the consideration. The use from decides the serial communication agreement to carry on the communication in CPU. Since this has been has not appeared on the market in FM24C16, most conforms to 4 controllers one way which this article proposed, also has normally applied in the middle of the actual system. Although may satisfy this system the need, takes the mouth line few, use nimble, but debugs quite tediously, because not only must correctly solve the good severance request problem, but also must carefully debug the succession as well as the communication agreement, in particular when in the middle of during 3 CPU communication, the monolithic confidential transmission each or each byte makes the response, the correspondence data quantity is bigger can consume the massive software resources, this requests the high place in some timeliness is does not permit. Moreover does not have CPU all to have respective duty, if the too many software resources will use in the data exchange, then lost has used the multi- CPU plan the significance.
5.2.FM24C16 characteristic
In view of from decides the serial communication agreement existence the question, we conceive if increase 1 data buffer between the monolithic integrated circuit, the large quantities of data first read in the buffer, then lets opposite party take again, each monolithic integrated circuit logarithm all is the host controls the pattern according to the buffer, like this inevitably can greatly enhance the correspondence efficiency. Does not choose EEPROM is because of its read-write number of times limited also the speed slow, but serial data cushion RAM not only has bought moreover the price to be very high with difficulty. The shift register also may make the data buffer, but present capacity biggest also only 128, because is "advanced first leaves" the structure, therefore no matter transmission data how many, the receiving end must move the entire register, the flexibility bad moreover the large capacity shift register also is rare difficultly to buy.
But is called along with the American Ramtran Corporation one kind "the poss ferroelectric random access memory" (is called FRAM) new nonvolatile storage promoting, has brought the solution to us. FM24C16 applied to the this article 4 controllers again is appropriate only.
Does not have to read in the time, the read-write number of times infinite has not distributed the merit which the structure may continuously write puts, has RAM and a EEPROM pair of characteristic
The price is lower therefore we may meet 3 CPU with 1 piece of FRAM Cheng Duozhu - from the I2C main line way, adds on several to shake hand the line,
The software aspect solves the I2C multi- hosts - from the control conflicts and corresponds the agreement question, then realizes simply, highly effective, the reliable correspondence.
6th, each CPU function plan
6.1.CPU1 function introduction
Duty 1: Fixed time transmits the black-white control information (in the 24C16 1st page of 01-08 byte)
Duty 2: Fixed time transmits the normal state information (in the 24C16 1st page of 61 byte)
Duty 3: According to condition real-time transfer system information 24C16 in 4th page of 01--- byte)
Duty 4: Fixed time inquires the CPU2 monitor information (in the 24C16 2nd page of 01-15 byte)
Duty 5: Fixed time inquires the CPU3 machine number information (in the 24C16 3rd page of 01-05 byte)
Duty 6: Fixed time inquires the CPU3 card information (in the 24C16 3rd page of 11-25 byte)
Duty 7: Monitors the serial mouth the order which sends out by on position machine
Duty 8: Processing card number information
Duty 9: Fixed time inquires the FM3808 clock information
6.2.CPU2 function introduction
Duty 1: Fixed time inquires the CPU1 control information (in the 24C16 1st page of 01-08 byte)
Duty 2: Each 2S inquires the CPU1 condition information (in the 24C16 1st page of 61 byte)
Duty 3: Each 2S inquires the CPU3 condition information (in the 24C16 3rd page of 31 byte)
Duty 4: Real-time transmission monitor information (in 24C16 2nd page of 01-15 byte)
Duty 5: Real-time transmission clock information (in 24C16 2nd page of 21-36 byte)
6.3.CPU3 function introduction
Duty 1: Fixed time transmission machine number information (in 24C16 3rd page of 01-05 byte)
Duty 2: According to changes the real-time transmission card information (in the 24C16 3rd page of 11-26 byte)
Duty 3: Fixed time transmission normal state information (in 24C16 3rd page of 31 byte)
Duty 4: Monitors 485 to read the card information
Duty 5: Monitors wigen26 to read the card information
Duty 6: Monitors the ABA/ keyboard simulation to read the card information

7. System function diagram

According to this in new window browsing 
picture

8. Concluding remark
This article produces based on the multi- cpu way 4 controllers, on the one hand non- is fully easy using poss ferroelectric random access memory FM3808 to lose RAM and the fusion clock, the monitoring and a body multi-purpose characteristic, on the other hand FM24c16 read-write speed quick, read-write number of times huge characteristic perfect inserting to during 3 cpu communication, realized the multi- cpu system use to be nimble, conveniently to program, the resources rich economical superiority.
This controller not only may take the automatic diagnosis multi- gates control system host controlling, moreover in domain and so on air conditioning control, industry control has also carried on the practice application, and has obtained the good effect.

9. references
(1) Joan Chen, one kind based on the poss ferroelectric random access memory serial communication technology, the monolithic integrated circuit and inserts the type system application, 2,002

10. Author synopsis
Name: A horse soldier
School record: Shandong University master
Main work: Is engaged in the monolithic integrated circuit and inserts the type system the research and development, key in based on the bar code, the magnetism card, the smart card, the radio frequency card, the radio frequency label 门禁, checking attendance, sells the food, stops the charge, the data acquisition terminal and so on the automatic diagnosis system design.
Unit of work: Shanghai gold Anter automatic diagnosis research and development center (Shanghai Yao industrious electron science and technology company)
Individual website: The automatic diagnosis grinds hairnet ----http://www.kingant.com/
Email: Mcu51net@163.net mcu51net@kingant.com
Mailing address: The Shanghai lotus flower road 288 makes 9 1,301
Telephone: 021-64803964 (evening 18: 00 - 22: 00)

Chief-editor: Article author:

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